1. Field of the Invention
The present invention relates to DDR (Double Data Rate) semiconductor devices such as a DDR SDRAM (Double-Data-Rate Synchronous Dynamic Random Access Memory). More particularly, the invention relates to a semiconductor memory device and a multilayered chip semiconductor device capable of reducing the data rate of the memory core to half or of making the input/output rate of an external I/O circuit twice as high as the internal input/output rate if the data rate is the same in the same manner as the DDR_SDRAM or the like.
2. Description of the Related Art
There exists a technique for making the data input/output rate of an external I/O circuit of the chip twice as high as the data rate at which data is written to and read from the internal memory core if the frequency is the same. The representative semiconductor memory to which this technique is applied is the DDR SDRAM of which the circuit structure and operations (data read/write in burst transfer mode and I/O circuit workings) are described in detail in Japanese Patent Laid-Open Nos. Hei 9-63263, Hei 11-39871 and 2001-202780; and Japanese Patent Application No. 2007-62296 (hereinafter referred to as Patent Document 1).
The technique for making the external data rate higher than the internal data rate applies essentially to diverse kinds of semiconductor memories in addition to DRAMs. For this reason, this technique is simply called DDR so that it will not be limited to such DRAMs as SDRAM from a data rate point of view. The semiconductor memories to which DDR is applied are called DDR memories. By contrast, the ordinary semiconductor memories to which DDR was not applied are called SDR (single data rate) memories, and the techniques excluding such application of DDR are simply called SDR.